ATmega328

AVR GCC assembler syntax

• A ; anywhere begins a comment.
• A # at the start of a line starts a comment, or a logical line number directive or preprocessor control command.
• A $ acts as a newline to separate statements, but doesn’t end a comment.
• Register names are r0 through r31 (r16 through r31 on the reduced core), case insensitive. Can also use the plain register number directly.
• Registers X (r26:r27), Y (r28:r29), and Z (r30:r31) exist, with the low address as the low byte. Can also use XL/XH and similar. Case insensitive.

More scrap

In avr-binutils:

• avr-as
  Assemble AVR assembly into object files
• avr-ld
  Link object files
• avr-objdump
  Disassembler, show instruction bytes
• avr-objcopy
  Convert ELF files into raw binary or Intel HEX
• avr-nm
  List symbols in object files

avrdude uploads programs to the Arduino Nano.

avr-gcc invokes the assembler for me??, with correct MCU settings.

.global main

.text

main:
    ldi r16, 0x42
    ldi r17, 0x17
    add r16, r17

loop:
    rjmp loop

Assemble with avr-gcc -mmcu=atmega328p -c test.S -o test.o, disassemble with avr-objdump -d test.o.

LDI R16, 0x42 becomes 0xE402, stored little endian (02 E4).

Scrap

• 8-bit data width
• 32 general purpose registers
• 32KB program memory
• 2KB SRAM
• 1KB EEPROM
• Stack kept in SRAM??
• Lots of interrupts
• Lots of addressing modes (direct, indirect, relative)
• AVRe+ instruction set variant, missing ELPM, EIJMP, EICALL (per ISM p. 149)

Register stuff:

• Arithmetic and logical instructions operate directly on any registers, so less movement required.
• LDI only loads values into R16-R31.
• X (R27:R26), Y (R29:R28), Z (R31:R30) are used for indirect memory access (they contain 16-bit addresses). LD R16, X+ loads a byte from the address stored in X and auto-increments X.
• CP R16, R17 performs a comparison and sets bits in the SREG status register, which we can then conditionally branch with.

Memory stuff:

• Program and data memory have separate address spaces.
• The program lives in flash, which has 16-bit words. Instructions are generally 16 bits wide. LPM is used to read a byte from flash (using byte addresses, not word addresses??).
• SRAM contains working data and the hardware stack. The stack pointer (SPL and SPH) must be initialised to a value.

Instruction stuff:

• LDI
  Load immediate constant
• MOV
  Copy register
• LDS
  Load from direct data address
• LD
  Load from SRAM
• ST
  Store to SRAM
• STS
  Store to direct data address
• PUSH
  Push register to stack
• POP
  Pop register from stack
• LPM
  Read program flash

• ADD:
• SUB:
• ADC:
• SBC:
• INC:
• DEC:
• MUL
  Unsigned multiply
• ADIW
  Add immediate to word
• SUBI
  Subtract immediate

• AND:
• OR
  IOR
• EOR
  XOR
• COM
  NOT
• NEG
  Two’s complement
• LSL
  Logical shift left
• LSR
  Logical shift right
• ASR
  Arithmetic shift right
• ROL
  Rotate left through carry
• ROR
  Rotate right through carry
• SWAP
  Swap nibbles

• RJMP
  Relative jump
• JMP
  Absolute jump
• RCALL
  Relative call
• CALL
  Absolute call
• RET
  Return from call
• RETI
  Return from interrupt
• BREQ
  Branch if equal
• BRNE
  Branch if not equal
• BRCS
  Branch if carry set
• BRCC
  Branch if carry clear
• BRMI
  Branch if

Memory organisation

Instruction set

Status register (SREG):

Registers and operands:

ADC

Add with carry. Adds registers Rd and Rr and the contents of the C flag and stores the result in register Rd. Sets H, S, V, N, Z, C.