74HC164
The 74HC164 is an 8-bit serial-in parallel-out shift register. Set input pin A, clock the CLK pin, and the input bit will shift into the output pin array starting from Q_A.
Notes
- Inputs
AandBare AND-gated, so both must be high in order for input to be high. You’ll normally just want to hardwireBhigh. ~CLRacts as a reset pin, bringing it low will set all outputs low.- Clocking occurs on the low-to-high transition of
CLK. - Data shifts into parallel outputs in alphabet order, starting from
Q_A. - Chain multiple chips together by linking
Q_Fof the first chip toAof the next, and connecting all sets ofV_CC,GND,~CLR, andCLKpins.
Pinout
| Pin | Label | Description |
|---|---|---|
| 1 | A |
Gated serial input 1 |
| 2 | B |
Gated serial input 2 |
| 3 | Q_A |
Parallel output |
| 4 | Q_B |
Parallel output |
| 5 | Q_C |
Parallel output |
| 6 | Q_D |
Parallel output |
| 7 | GND |
Ground |
| 8 | CLK |
Clock |
| 9 | ~CLR |
Clear (active low) |
| 10 | Q_E |
Parallel output |
| 11 | Q_F |
Parallel output |
| 12 | Q_G |
Parallel output |
| 13 | Q_H |
Parallel output |
| 14 | V_CC |
Power |
Characteristics
| Characteristic | Value |
|---|---|
| Max. input current | 1μA |
| Max. operating current | 80μA |
| Max. output pin drive current | 4mA |
| Input voltage | 2V to 6V |
74HC165
The 74HC165 is an 8-bit parallel-in serial-out shift register. Set input pins A through H and pull SH/~LD low to load data into the chip. To read this data, pull SH/~LD high and clock the CLK pin eight times, reading each bit from Q_H in reverse alphabet order.
Notes
- Clocking occurs on the low-to-high transition of
CLKwhileSH/~LDis high andCLK INHis low. - Data shifts into serial outputs in reverse alphabet order, starting from
H. - Chain multiple chips together by linking
Q_Hof the first chip toSERof the next, and connecting all sets ofV_CC,GND, andCLKpins.
Pinout
| Pin | Label | Description |
|---|---|---|
| 1 | SH/~LD |
Shift or load data |
| 2 | CLK |
Clock |
| 3 | E |
Parallel input |
| 4 | F |
Parallel input |
| 5 | G |
Parallel input |
| 6 | H |
Parallel input |
| 7 | ~Q_H |
Serial output (complimentary) |
| 8 | GND |
Ground |
| 9 | Q_H |
Serial output |
| 10 | SER |
Serial input |
| 11 | A |
Parallel input |
| 12 | B |
Parallel input |
| 13 | C |
Parallel input |
| 14 | D |
Parallel input |
| 15 | CLK INH |
Clock inhibit |
| 16 | V_CC |
Power |
Characteristics
| Characteristic | Value |
|---|---|
| Max. input current | 1μA |
| Max. operating current | 80μA |
| Max. output pin drive current | 4mA |
| Input voltage | 2V to 6V |
74HC595
The 74HC595 is an 8-bit latching serial-in parallel-out shift register. Set input pin SER and clock the SRCLK pin eight times to load data into the shift register, and then clock the RCLK pin to latch the shift register data into the storage register.
Notes
- Clocking occurs on the low-to-high transistion of
SRCLKandRCLK. - When the
~OEpin is low, the parallel output pins temporarily enter a high-impedance disabled state. - Pulling the
~SRCLRpin low will clear the shift register. - Clocking the
SRCLKpin will shift data fromSERinto the shift register in alphabet order, starting fromQ_A. - Clocking the
RCLKpin will copy shift register data into the storage register. - Chain multiple chips together by linking
Q_H'of the first chip toSERof the next, and connecting all sets ofV_CC,GND,SRCLK,~SRCLR,RCLK, and~OEpins.
Pinout
| Pin | Label | Description |
|---|---|---|
| 1 | Q_B |
Storage register parallel output |
| 2 | Q_C |
Storage register parallel output |
| 3 | Q_D |
Storage register parallel output |
| 4 | Q_E |
Storage register parallel output |
| 5 | Q_F |
Storage register parallel output |
| 6 | Q_G |
Storage register parallel output |
| 7 | Q_H |
Storage register parallel output |
| 8 | GND |
Ground |
| 9 | Q_H' |
Shift register serial output |
| 10 | ~SRCLR |
Shift register clear (active low) |
| 11 | SRCLK |
Shift register clock |
| 12 | RCLK |
Storage register clock |
| 13 | ~OE |
Output enable (active low) |
| 14 | SER |
Shift register serial input |
| 15 | Q_A |
Storage register parallel output |
| 16 | V_CC |
Power |
Characteristics
| Characteristic | Value |
|---|---|
| Max. input current | 1μA |
| Max. operating current | 80μA |
| Max. output pin drive current | 4mA |
| Input voltage | 2V to 6V |
Header pins
| Pitch | 2.54mm |
| Height (total) | 11.54mm |
| Height (base) | 3mm |
| Height (pin) | 6mm |
| Pin thickness | 0.64mm |
PCB
| Thickness | 1.6mm |
SOIC-8
Length | 4.90mm
Body width | 3.90mm
Width (incl. legs) | 6.00mm