Original documentation
The following table is copied directly from the PICmicro Mid-Range MCU Family Reference Manual (DS33023A)
Mnem. | Description | Cycles | Opcode | Flags |
---|---|---|---|---|
ADDWF | Add W and f | 1 | 00 0111 dfff ffff |
C,DC,Z |
ANDWF | AND W with f | 1 | 00 0101 dfff ffff |
Z |
CLRF | Clear f | 1 | 00 0001 1fff ffff |
Z |
CLRW | Clear W | 1 | 00 0001 0xxx xxxx |
Z |
COMF | Complement f | 1 | 00 1001 dfff ffff |
Z |
DECF | Decrement f | 1 | 00 0011 dfff ffff |
Z |
DECFSZ | Decrement f, Skip if 0 | 1* | 00 1011 dfff ffff |
|
INCF | Increment f | 1 | 00 1010 dfff ffff |
Z |
INCFSZ | Increment f, Skip if 0 | 1* | 00 1111 dfff ffff |
|
IORWF | Inclusive OR W with f | 1 | 00 0100 dfff ffff |
Z |
MOVF | Move f | 1 | 00 1000 dfff ffff |
Z |
MOVWF | Move W to f | 1 | 00 0000 1fff ffff |
|
NOP | No Operation | 1 | 00 0000 0xx0 0000 |
|
RLF | Rotate Left f through Carry | 1 | 00 1101 dfff ffff |
C |
RRF | Rotate Right f through Carry | 1 | 00 1100 dfff ffff |
C |
SUBWF | Subtract W from f | 1 | 00 0010 dfff ffff |
C,DC,Z |
SWAPF | Swap nibbles in f | 1 | 00 1110 dfff ffff |
|
XORWF | Exclusive OR W with f | 1 | 00 0110 dfff ffff |
Z |
BCF | Bit Clear f | 1 | 01 00bb bfff ffff |
|
BSF | Bit Set f | 1 | 01 01bb bfff ffff |
|
BTFSC | Bit Test f, Skip if Clear | 1* | 01 10bb bfff ffff |
|
BTFSS | Bit Test f, Skip if Set | 1* | 01 11bb bfff ffff |
|
ADDLW | Add literal and W | 1 | 11 111x kkkk kkkk |
C,DC,Z |
ANDLW | AND literal with W | 1 | 11 1001 kkkk kkkk |
Z |
CALL | Call Subroutine | 2 | 10 0kkk kkkk kkkk |
|
CLRWDT | Clear Watchdog Timer | 1 | 00 0000 0110 0100 |
TO,PD |
GOTO | Go to address | 2 | 10 1kkk kkkk kkkk |
|
IORLW | Inclusive OR literal with W | 1 | 11 1000 kkkk kkkk |
Z |
MOVLW | Move literal to W | 1 | 11 00xx kkkk kkkk |
|
RETFIE | Return from interrupt | 2 | 00 0000 0000 1001 |
|
RETLW | Return with literal in W | 2 | 11 01xx kkkk kkkk |
|
RETURN | Return from Subroutine | 2 | 00 0000 0000 1000 |
|
SLEEP | Go into Standby mode | 1 | 00 0000 0110 0011 |
TO,PD |
SUBLW | Subtract W from literal | 1 | 11 110x kkkk kkkk |
C,DC,Z |
XORLW | Exclusive OR literal with W | 1 | 11 1010 kkkk kkkk |
Z |
If the program counter is modified or a conditional test is true, the instruction will take 2 cycles.
Ben’s instruction naming scheme
Mnem. | Description | Cycles | Opcode | Flags |
---|---|---|---|---|
CLRf | f = 0 |
1 | 00 0001 1fff ffff |
Z |
CLR | W = 0 |
1 | 00 0001 0xxx xxxx |
Z |
MOVw | W = f |
1 | 00 1000 0fff ffff |
Z |
MOVf | f = W |
1 | 00 0000 1fff ffff |
|
MOV | W = k |
1 | 11 00xx kkkk kkkk |
|
TEST | f = f |
1 | 00 1000 1fff ffff |
Z |
ADDw | W = f plus W |
1 | 00 0111 0fff ffff |
C,DC,Z |
ADDf | f = f plus W |
1 | 00 0111 1fff ffff |
C,DC,Z |
ADD | W = k plus W |
1 | 11 111x kkkk kkkk |
C,DC,Z |
SUBw | W = f minus W |
1 | 00 0010 0fff ffff |
C,DC,Z |
SUBf | W = f minus W |
1 | 00 0010 1fff ffff |
C,DC,Z |
SUB | W = k minus W |
1 | 11 110x kkkk kkkk |
C,DC,Z |
INCw | W = f plus 1 |
1 | 00 1010 0fff ffff |
Z |
INCf | f = f plus 1 |
1 | 00 1010 1fff ffff |
Z |
DECw | W = f minus 1 |
1 | 00 0011 0fff ffff |
Z |
DECf | f = f minus 1 |
1 | 00 0011 1fff ffff |
Z |
ANDw | W = f and W |
1 | 00 0101 0fff ffff |
Z |
ANDf | f = f and W |
1 | 00 0101 1fff ffff |
Z |
AND | W = k and W |
1 | 11 1001 kkkk kkkk |
Z |
IORw | W = f or W |
1 | 00 0100 0fff ffff |
Z |
IORf | f = f or W |
1 | 00 0100 1fff ffff |
Z |
IOR | W = k or W |
1 | 11 1000 kkkk kkkk |
Z |
XORw | W = f xor W |
1 | 00 0110 0fff ffff |
Z |
XORf | f = f xor W |
1 | 00 0110 1fff ffff |
Z |
XOR | W = k xor W |
1 | 11 1010 kkkk kkkk |
Z |
NOTw | W = not f |
1 | 00 1001 0fff ffff |
Z |
NOTf | f = not f |
1 | 00 1001 1fff ffff |
Z |
ROLw | W = f rotate left 1 |
1 | 00 1101 0fff ffff |
C |
ROLf | f = f rotate left 1 |
1 | 00 1101 1fff ffff |
C |
RORw | W = f rotate right 1 |
1 | 00 1100 0fff ffff |
C |
RORf | f = f rotate right 1 |
1 | 00 1100 1fff ffff |
C |
SWPw | W = f rotate 4 |
1 | 00 1110 0fff ffff |
|
SWPf | f = f rotate 4 |
1 | 00 1110 1fff ffff |
|
ISZw | W = f plus 1 , skip if 0 |
1* | 00 1111 0fff ffff |
|
ISZf | f = f plus 1 , skip if 0 |
1* | 00 1111 1fff ffff |
|
DSZw | W = f minus 1 , skip if 0 |
1* | 00 1011 0fff ffff |
|
DSZf | f = f minus 1 , skip if 0 |
1* | 00 1011 1fff ffff |
|
BCLR | Clear bit b of f |
1 | 01 00bb bfff ffff |
|
BSET | Set bit b of f |
1 | 01 01bb bfff ffff |
|
SCLR | Skip if bit b of f is clear |
1* | 01 10bb bfff ffff |
|
SSET | Skip if bit b of f is set |
1* | 01 11bb bfff ffff |
|
CALL | Call subroutine | 2 | 10 0kkk kkkk kkkk |
|
GOTO | Jump to address | 2 | 10 1kkk kkkk kkkk |
|
RETURN | Return from subroutine | 2 | 00 0000 0000 1000 |
|
SLEEP | Enter standby mode | 1 | 00 0000 0110 0011 |
TO,PD |
DATA | W = k , return |
2 | 11 01xx kkkk kkkk |
|
NOP | No Operation | 1 | 00 0000 0xx0 0000 |
|
CLEARWDT | Clear watchdog timer | 1 | 00 0000 0110 0100 |
TO,PD |
INTRETURN | Return from interrupt | 2 | 00 0000 0000 1001 |