PIC10F200 microcontroller reference

Overview

If multiple functions are enabled on pin 3, the following order of presidence is used:

• F’OSC (instruction cycle oscillator output), else
• T0CKI (clock input for timer0), else
• TRIS (GPIO)

1. --
2. Supply voltage (V’DD)
3. GP2 / TMR0 input / F’OSC output (GP2)
4. GP1 / ICSP clock (GP1)
5. GP0 / ICSP data (GP0)
6. --
7. Ground (GND)
8. GP3 / ICSP power / ~MCLR (GP3)

Clock

The PIC10F200 has a single clock option, an internal oscillator with a nominal frequency of 4MHz. The mean frequency of the internal oscillator is 4MHz. Tolerances are:

• ±1% at 3V and 25°C
• ±2% at 2.5V..5.5V and 0°C..85°C
• ±5% at 2.0V..5.5V and -40°C..85°C

Each instruction takes four clock cycles to execute.

A decoupling capacitor of 0.1μf or 0.01μf should be placed to bridge the power and ground wires as close to the microcontroller as possible, which will filter out voltage source noise and improve oscillator stability.

Program memory

Addresses 0x0000..0x00FE are program memory. Address 0x00FF is the reset vector, which contains an oscillator calibration value encoded as a MOVLW instruction. Addresses 0x0100..0x01FF are not physically implemented, and accessing them will instead wrap back around into the 0x0000..0x00FF address range.

The program counter is 9 bits, but only the lower 8-bits are used by the PIC10F200, due to the 256-word ROM size. The stack has two levels.

Data memory

The program counter is incremented each cycle, and will always contain the address of the next instruction to be executed.

STATUS register

OPTION register

This table describes the behaviour of the pre-scaler rate select bits. The TMR0 column applies if the pre-scaler has been assigned to Timer0, or WDT for the watchdog timer.

OSCCAL register (oscillator calibration)

Configures the internal 4MHz oscillator. The 7-bit value spread over CAL[6..0] is a signed integer used to skew the frequency of the internal oscillator, as shown in the table below. Positive skew increases the frequency, negative skew reduces the frequency, and skew of 0 is nominal frequency.

If FOSC4 is set to 1, every fourth pulse of the internal oscillator will be output on pin 3 (GP2).

TRISGPIO register

Configures the input/output mode for each GPIO pin. This register has no physical address, and can only be set by setting W to the desired value and then calling TRIS f, where f can be either 6 or 7. I think 6 is the one we want. A value of 1 will set a pin to input mode, and a value of 0 will set a pin to output mode.

GPIO register

Writing to the GPIO register will set the output state of each pin, even when the pin is set to input mode. Reading from the GPIO register will always read in the external voltage of that pin, even when the pin is set to output mode.

Be careful when using this register with instructions that are implemented internally as a read followed by a write (BCF and BSF are two such examples). The read will read in the input values of the pins, and the output will set the output states of the pins. This is only an issue if a pin is initially used as an input pin but is later changed over to be an output pin, as the output state will now be unknown.

Reset types

• Power-on-reset
• ~MCLR reset during normal operation
• ~MCLR reset during sleep
• Watchdog timer time-out reset during normal operation
• Watchdog timer time-out reset during sleep
• Wake-up from sleep on pin change

Power-on-reset

TODO.

Device reset timer

TODO.

Watchdog timer

TODO.

Timer 0 (TMR0)

TODO.

PIC10F200 programming reference

In Program/Verify mode, the program memory space encompasses:

The ‘User ID’ locations are designed to hold identifiers to be read by external program verification tools.

The ‘Back-up OSCCAL value’ exists to make possible the reading of the oscillator callibration value even whilst code protection is enabled.

The Configuration Word register is physically located at 0x01FF, and is only available during Program mode entry. After the program counter has been incremented past this address the register will no longer be available, regardless of the value of the program counter. By convention, the configuration word is stored at logical address 0x0FFF in the ROM file, and it is the responsibility of the programmer software to translate this address over to the proper physical address during programming.

Methods for entering Program/Verify mode

The V’PP-first method prevents the device from executing code prior to entering Program/Verify mode, as code execution is likely to prevent correct entry into Program/Verify mode.

• Remove power from all pins
• Hold ICSP’CLK and ICSP’DAT low
• Raise the voltage on ICSP’PWR from 0V to programming voltage
• Wait 5μs
• Raise the voltage on V’DD from 0V to operating voltage.
• Wait 5μs

The V’DD-first method allows entry into Program/Verify mode without first needing to disconnect power from V’DD.

• Hold ICSP’CLK and ICSP’DAT low
• Raise the voltage on V’DD from 0V to operating voltage
• Wait 5μs
• Raise the voltage on ICSP’PWR from operating voltage to programming voltage
• Wait 5μs

To exit Program/Verify mode, drop voltage of ICSP’PWR to operating voltage or lower.

Programming commands are 6-bits wide. Commands followed by data require a delay of 1μs ater the command, followed by 16 clock pulses to transmit the start bit, 14 data bits, and an end bit.

Commands and data are transmitted in little-endian, with the data pin latching on the falling edge of the clock. A hold period of 1μs with the data pin remaining unchanged is required on either side of the clock falling-edge.

A delay of 100μs is required after every ‘End Programming’ command.

The data values of the start and end bits are ignored.

During ‘Read’ commands, the ICSP’DAT pin changes from input mode to output mode at the rising-edge of the 2nd data clock (the first data clock after the Start bit), and returns to input mode at the rising edge of the 16th data clock (the Stop bit).

Minimum of 100ns delay between data change and clock falling-edge, and between clock falling-edge and next data change.

Commands

Note: Command bits are denoted here in little-endian, which is the order in which they are to be transmitted.

Note TODO: Load, then Begin, then 2ms, then End, then Incr., then rinse+repeat.

The ‘Write Progam’ command loads a 12-bit value into the current memory word. The two most significant bits of the data word are ignored.

The ‘Read Program’ command outputs the value of the current memory word.

The ‘Bulk Erase Program’ command fills the program memory, the oscillator callibration instruction (at 0x00FF), and the configuration word (at 0x01FF) with all 1’s, taking 10ms.

End Program terminates the programming process. A delay of 100μs is required before issuing the next command in order to allow the programming voltage to dissipate.

Instruction set

33 instructions, 12-bits wide.

Test program for PIC10F200

Preamble

%ADDw:f    [ 0001 110f ffff ]
%ADDf:f    [ 0001 111f ffff ]
%ANDw:f    [ 0001 010f ffff ]
%ANDf:f    [ 0001 011f ffff ]
%ANDk:k    [ 1110 kkkk kkkk ]
%BCLR:f:b  [ 0100 bbbf ffff ]
%BSET:f:b  [ 0101 bbbf ffff ]
%BSKP0:f:b [ 0110 bbbf ffff ]
%BSKP1:f:b [ 0111 bbbf ffff ]
%CALL:k    [ 1001 kkkk kkkk ]
%CLRw      [ 0000 0100 0000 ]
%CLRf:f    [ 0000 011f ffff ]
%CLRWDT    [ 0000 0000 0100 ]
%DECw:f    [ 0000 110f ffff ]
%DECf:f    [ 0000 111f ffff ]
%DECZw:f   [ 0010 110f ffff ]
%DECZf:f   [ 0010 111f ffff ]
%EORw:f    [ 0001 100f ffff ]
%EORf:f    [ 0001 100f ffff ]
%EORk:k    [ 1111 kkkk kkkk ]
%GOTO:k    [ 101k kkkk kkkk ]
%NOP       [ 0000 0000 0000 ]
%NOTw:f    [ 0010 010f ffff ]
%NOTf:f    [ 0010 011f ffff ]
%INCw:f    [ 0010 100f ffff ]
%INCf:f    [ 0010 101f ffff ]
%INCZw:f   [ 0011 110f ffff ]
%INCZf:f   [ 0011 111f ffff ]
%IORw:f    [ 0001 000f ffff ]
%IORf:f    [ 0001 001f ffff ]
%IORk:k    [ 1101 kkkk kkkk ]
%ROLw:f    [ 0011 010f ffff ]
%ROLf:f    [ 0011 011f ffff ]
%RORw:f    [ 0011 000f ffff ]
%RORf:f    [ 0011 001f ffff ]
%SETw:f    [ 0010 000f ffff ]
%SETf:f    [ 0000 001f ffff ]
%SETk:f    [ 1100 kkkk kkkk ]
%SUBw:f    [ 0000 100f ffff ]
%SUBf:f    [ 0000 101f ffff ]
%SWPw:f    [ 0011 100f ffff ]
%SWPf:f    [ 0011 101f ffff ]
%TESTf:f   [ 0010 001f ffff ]
%OPTIONf   [ 0000 0000 0010 ]
%RETk:k    [ 1000 kkkk kkkk ]
%SLEEP     [ 0000 0000 0011 ]
%TRISf:f   [ 0000 0000 0fff ]

Blinker Program

TODO